This invention relates generally to integrated circuits (ICs), and more particularly to IC packaging.
Ball grid array (BGA) packages are ceramic or organic laminate board packages that are attached to the printed circuit boards (PCBs) by way of solder connections, typically in the form of a solder ball. Prior to the invention of the solder connections, and to the present date, packages called Pin Grid Arrays (PGAs) are used where the connection between the package and the PCBs were long pins made of Alloy 42.RTM., or Kovar.RTM., or copper.
The solder ball connections provide the advantages of better density, lower cost, better electrical performance, and most importantly ease of handling and hence auto loading capabilities compared to the PGAs, since the pins can easily bend. However, solder ball connections suffer the disadvantage of joint reliability during thermal cycling when the substrate material are not matched from a thermal expansion point of view. For example, PCBs typically have a thermal expansion between 13 ppm/.degree. C. to 20 ppm/.degree. C., compared to the commonly used aluminum oxide ceramic of 7 ppm/.degree. C. Other ceramics like Aluminum nitride (4.5 ppm/.degree. C.), and low dielectric constant glass ceramic (2 to 3 ppm/.degree. C.) which have been designed to match the thermal expansion coefficient of Silicon (2.5 ppm/.degree. C.) have even a worse matching to PCBs.
Reliability of the solder ball connection between the package and the PCBs, often referred to in terms of number of thermal fatigue cycles it can withstand, varies as an inverse function (in fact a square dependence following the Coffin-Manson relation) of the thermal expansion coefficient mismatch between package and the PCB, temperature excursion of the cycle and the size of the package, and varies as a direct function with the height of the solder joint. The Coffin-Manson relation is described, for example, in the "Microelectronics Handbook", Pub.Van Nostrand Reinhold, New York, 1989, incorporated herein by reference. See, for example, "Microelectronics Handbook", p295, Chapter 5. Temperature excursion of the cycle for most of the products where these joints used are fixed specified by the product specifications.
Several implications of the Coffin-Manson relation are, for a given substrate/PCB combination, the reliability can be enhanced by increasing the height of the joint, or having the substrate smaller. To have a smaller substrate is a limitation on the functionality, and hence is not a recommended option. Taller joints are an option, and the long solder joints called solder columns have been proposed and used in limited applications. However, these suffer the disadvantages of being not very robust in handling due to lead bending issues, and requiring sophisticated processes that make it expensive compared to solder balls; of course the other main issue with the solder columns is it poses difficulty in testing (and test and burn in) of the packages. There have been other alternatives to increase the life of the joint, like filling of the gap between the package and the PCB with a resin. While this can be an alternative, this does require additional process steps, and it would make the rework of the package almost impossible.
A recent invention, provides for the use of double headed pin to increase the life of the interconnection during thermal cycling. See, for example, "Surface mounting pin grid arrays", Pete Dawson et. al., U.S. Pat. No. 5,484,964, January 1996, incorporated herein by reference. However, there is added cost both for the material and the processing of the double headed pin. Furthermore, there is a handling issue.
Still further, at very high frequencies, long pins have the disadvantage of higher lead inductance, which can be remedied with shorter interconnections like the solder balls. Also, solder ball carriers in the form of a lead frame with over molding with plastic (OMPAC, from Motorola and Citizen), or using an organic laminate package are becoming a more standard package for the low lead count, low cost packages for applications like memory and low pin count application specific integrated circuits.
See, for example, "Pad Array Improves Density", Howard Markstein, Electronic Packaging and Production, May 1992, incorporated herein by reference. A solution to address the high pin count, high density packages both for single chip and multichip packages that will have the similar solder ball connection would be highly desirable.
From the discussion above, matching the thermal expansion coefficients of the PCB and the substrate as an attractive alternative to the problem of joint reliability. Ball Grid Array packages made of organic laminate materials (similar to or same as the PCB) do have very good reliability of the joint that are able to withstand several thousand cycles of accelerated thermal cycling. However, organic laminate substrates do have the limitation of routing densities, especially with respect to the formation of vias between the layers of the substrate. Also, organic laminates tend to be more expensive, when more number of layers for routing are required, or fine density vias are required.
Another approach is the thermal expansion coefficient matching of the PCB itself. There have been solutions like embedding Copper clad Invar types of material in the center of the PCB to bring the expansion coefficient of the PCB close to that of alumina ceramic. But these materials tend to be prohibitively expensive and, since the usage of PCB measured by the area typically happens to be at least an order of magnitude larger than the package, fixing the PCB expansion coefficient would be a very expensive proposition.
Several prior art ceramic packages are illustrated in FIGS. 1a, 1b, and 1c. In FIG. 1a, a prior art ceramic package 10 includes a "flip chip" 12 (ie. an inverted integrated circuit die), interconnects 14, a conventional multi-layer ceramic/organic substrate 16, and a solder ball grid array 18. A resin "underfill" 20 protects the face of the flip chip 12. In FIG. 1b, a prior art ceramic package 22 includes a flip chip 24, a interconnects 26, multilayer ceramic for flip chips 28, resin underfill 30, and column grid array interconnects 32. In FIG. 1c, a prior art ceramic package 34 includes an integrated circuit die ("chip") 36 attached by a die attach 38 to a multi-layer ceramic for wire-bonded devices 40. An alternative to the multi-layer ceramic 40 would be a printed circuit board (PCB). Pads on the die 36 are "wire bonded" to pads on the ceramic 40 with wires 42. The package 34 further includes a pin grid array interconnect 44. The package 10 of the prior art suffers from the thermal incompatibilities discussed above, leading to premature failure of the solder ball grid array 18. The packages 22 and 34 are more resistant to thermal incompatibilities, but suffer from the aforementioned problems of column grid array interconnects.